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Classified in: Science and technology
Subjects: Conference, Reminder

RISC-V Foundation Announces Agenda for RISC-V Workshop Taiwan Region

RISC-V Foundation:

WHERE: Ambassador Hotel, No. 188?, Section 2, Zhonghua Rd, East District, Hsinchu City, Taiwan Region 30060

WHEN: Tuesday, March 12 to Wednesday, March 13, 2019

WHAT: The RISC-V Workshop Taiwan Region will showcase the open, expansive and international RISC-V ecosystem, highlighting current and prospective projects and implementations that influence the future evolution of the RISC-V instruction set architecture (ISA), with a focus on the growth of the RISC-V ecosystem across China and Asia.

The event will feature a variety of speaking sessions, along with poster presentations and demonstrations. RISC-V Foundation member companies presenting at the Workshop include: Andes Technology; Codasip; Cryptape Technology; Hex Five Security; MediaTek; Microsemi, a wholly owned subsidiary of Microchip Technology Inc.; Nuclei System Technology; SiFive; Software Hardware Consulting (SH Consulting); Syntacore; and Western Digital. Andes Technology will present the keynote on Tuesday, March 12. The event schedule is as follows:

Tuesday, March 12, 2019:

Wednesday, March 13, 2019:

To register for the event, please visit: https://tmt.knect365.com/risc-v-workshop-taiwan/purchase/select-package. To learn more about sponsorship opportunities, please visit: https://tmt.knect365.com/risc-v-workshop-taiwan/sponsor.

For press interested in attending, please email: [email protected] to receive your complimentary pass. To learn more about the RISC-V Foundation, its open, free architecture and membership information, please visit: https://riscv.org.

About RISC-V Foundation

RISC-V (pronounced "risk-five") is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 200 member organizations building the first open, collaborative community of software and hardware innovators powering innovation at the edge forward. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.

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News published on 11 march 2019 at 06:35 and distributed by: